Відео

Very nice and informative. However at 0:50 the IC on the right has had its tip removed in a brutal enough away to destroy must of the leads that join the silicone to the external pad/leg. Someone should have hunted a bit harder when doing a Google image search. :)

Finally my video got published....it's an honour 💖

Please, do not create a #RISCV key when emacs can bind new functions to old keys.

once you go open, you can't return to proprietary.

If they can make development on FPGA less painful, then it could be a win for PolarFire over Xilinx/Altera.

Hi , thanks for your presentation . I have a question for you , currently i working on my final project in subject of " using RISC-V in IOT space " so where can i find useful and free courses to develop my knowledge in this area . thanks in advance

Q: Will RISC-V-AI eschew COP-ilot?

looks much like a Cray-1

How to knwo the purpose of each cell in the PDK? How to know if the open-source tools are implementing a Clock-gating correctly with the most optimized cell for it? And for other Low-power cells like: Level-shifters, Isolation cell, Retention register, Power switch, Always-On? There is NO such information in the documentation.

where to get the codes for this

👍👍👍👍

incredible

>Woman CEO Oh god the project is dead

This woman is admirable

Motorola's 68K has played a far bigger role than most of those listed so why no mention?

Which version of risc v is this for?

This was so much fun!

If you are a leader of a company of a software/hardware team, please appreciate the openness that RISC-V inherently brings and embrace it! :)

I'm so glad to be a part of this community!

Nice update.

We need documentation that shows us how to get jtag working with these boards

Finally, a small board with ECC!

Still rather slow compared to ARM.

Well explained..

crazy wow

We just had LatchUP 2024 at MIT. There are some really incredible things happening in the RISC-V hardware space. I think we're going to see a lot of new open devboards soon. Then we'll start to see open hardware for things like home routers, robotics controllers, and embedded controllers. The only challenge I see is that while it is easy to source RV32 chips there is not much available for RV64. As he was saying it the video about the 906 missing RVV 1.0, it's really just a matter of timing r/n. Next year will be a whole different ecosystem, I think. Especially with what's going on in Russia and China with RISC-V emerging as an alternative to x86_64 and ARM64.

The slides are very difficult to read @480p

terminal with 480p screen grab - thanks for making it not readable ...

LET'S GOOOOOOO!!!!

Works on Ubuntu?

Thanks.

包包辛苦了！

Very good

thank you so much. Especiall Q&A session is so beneficial for me. thanks for both askers and answerers.

Thanks for the presentation. Does aapg a continueation of this repo?

It’s like no offence to anyone, but it took like 40 years to make North Korea an 8 bit rad hard microchip

I mean international court held the document Iran downloads RISC V for its rocket missle, and international court says it’s fair game, Iran downloaded it legally

the whole world is naming China in multiple crimes, but yeah this is that guy who did that thing for China, hey it’s him

But you got to be FTX cryptocurrency huh? Pretty bad deal

That guy who made North Korea RISC V If you call that “that thing” then I guess your that thing

Is there a link to the 7400 logic breakdown/design ?

RISC-V 101: What is RISC-V? - John Ronco, SiFive - 5:39 Why RISC-V? - Keith Graham, Codasip - 36:55 The RISC-V Ecosystem - Ted Speers, Microchip - 56:19 Make vs. Buy on RISC-V - Larry Lapides, Imperas - 1:22:59 Software - Jefro Osier-Mixon, Red Hat & RISE - 1:45:43 Getting Involved in RISC-V Technical Committees - Martin Maas, Google - 1:56:32

Great job presenting here!

Thank you

So hitech i literally sleep at night watching this video

Hello is the sound cutting out for anyone else

Smokin hott

I wonder how the US vs. China stuff will affect the future of RISC-V

I have found the presentation amazing, many thanks for sharing this presentation. I have attended similar events that were organised by Synopsys and AMD in the UK. As a university lecturer, I wondered that why there is a major gap between the universities and industry.

BTW, I love the idea of running SERV from SPI flash. I was working on a SPI-oriented CPU a while back, but became disenchanted because immediately-useful projects like SERV already existed.